Before a circuit assembly is sold by its manufacturer or is incorporated into a larger assembly, it needs to be tested. The circuit assembly can either simply be tested as to whether it passes or fails predetermined tests or additionally if the circuit assembly fails, diagnosis can be carried out to ascertain the cause(s) of test failure. In any case there is a need for a reliable test environment-one which will consistently pass good circuit assemblies and fail faulty ones.
There are several known circuit assembly test systems. One known test system will be described with reference to FIGS. 1-4 of which:
FIG. 1 is a diagrammatic representation of a known test system;
FIG. 2 is a perspective view of the known test system of FIG. 1;
FIG. 3 is a section of part of the testhead of the known test system of FIGS. 1 and 2;
FIG. 4 represents the known debugging process.
A known test system shown in FIG. 1 is for in-circuit testing of analogue circuit assemblies. The known test system 10 comprises:
a data base 12 for storing data concerning the topology of a circuit assembly 14, say a printed circuit board 14, to be tested; PA1 a test program generator 16 for generating tests for each of the components on the board 14 and for specifying the hardware set-up required to test the board 14: PA1 a test program controller 18 for causing tests to be performed and for evaluating and outputting test results; PA1 a test hardware module 20 for generating test signals and applying these to the board 14; PA1 an in-circuit test device or `fixture` 22 which is configured for the particular board under test and to which the board 14 is electrically connected during testing. In this embodiment, the fixture 22 is vacuum-sealed to the board 14 although other fixing methods can be used. PA1 a tiltable housing 30 mounted on a supporting cradle 31 and supporting a test head 32 to be more fully described with reference to FIG. C. The housing 30 contains the test hardware module 20; PA1 a rack 33 including supply and distribution power units; PA1 a controlling computer 34, a monitor 36, a keyboard 38 and a mouse 40; PA1 a printer 42 pivotally attached to the supporting frame 31; PA1 a guided probe 44 located next to the testhead 32 in a probe holder. PA1 i) it is a skilled and time-consuming operation; PA1 ii) lack of sufficient expertise has meant that non-optional test suites are generated; PA1 iii) the root causes of test failures are not evaluated and addressed. PA1 that physical defects are masked e.g. a bad guard probe contact can be `fixed` by increasing the nominal test value or widening the tolerance; PA1 ii) deficiencies in the data in the circuit assembly database 12 remain--this can mean that other tests which passed should really have failed and also means that faulty data forms the basis for new tests generated to take account of later circuit assembly revisions. PA1 means for storing data relating to the topology of a circuit assembly; PA1 means for storing testing data; PA1 means for performing tests on said circuit assembly and storing the test results: PA1 means for generating and storing possible causes of test failures; PA1 means for predicting test results assuming said possible causes of test failure; PA1 means for maintaining consistency between observed test results and predicted test results, and PA1 means for indicating possible causes of test failure which are consistent with observed test results. PA1 means for storing data relating to the topology of a circuit assembly; PA1 means for performing tests on said circuit assembly and storing the test results, said expert system comprising: PA1 means for generating and storing possible causes of test failure; PA1 means for predicting and storing test results assuming said possible causes of test failure; PA1 means for maintaining consistency between obtained test results and predicted test results, PA1 and means for indicating possible causes of test failure which are consistent with obtained test results. PA1 (a) performing tests on said circuit assembly and storing the test results; PA1 (b) generating and storing possible causes of test failures; PA1 (c) predicting and storing test results assuming said possible causes of test failure; PA1 (d) maintaining consistency between obtained test results and predicted test results, and PA1 (e) indicating possible causes of test failure which are consistent with obtained test results. PA1 (a) devising further tests for evaluating said predicted test results; PA1 (b) performing one or more of said further tests; PA1 (c) eliminating ones of said stored possible causes of test failure which are not consistent with the results of said further tests.
The database 12 includes data on the analogue component descriptions, the board topology and physical dimensions as well as test strategy data such as the duration of tests and the degree of precision to which specific components need to be tested. The test program generator 16 uses the data in the database 12 to generate a suite of tests for the board 14. In addition, the test program generator 16 generates a specification for the set-up of the test hardware module 20 and the fixture 22 for applying the tests to the board 14.
The function of the fixture 22 is to interconnect every potential circuit node on the board 14 to the fixed sockets in the test hardware module 20 as will be described more fully with reference to FIG. 3.
FIG. 2 shows the system 10 in perspective and the silhouette of a notional user. The system 10 is one of the HP3070 family of circuit assembly test systems made and sold by the applicant, and comprises:
The housing 30 is tillable through 90 degrees to a position to suit the user. The rack 33 contains a power supply unit for supplying dc voltages to testhead 32. Where different testheads are to be used, there is a power supply unit for each one. The rack 33 also contains a power distribution unit for distributing various ac and dc voltages to different parts of the system. The rack 33 further contains a power supply unit for supplying power to each circuit assembly which can be tested by the system 10. The computer 34 is a workstation which provides the user interface to the system 10 to enable the user to monitor and control the debugging process. The guided probe 44 enables the user to verify fixture wiring and carry out other manual checks. A section through part of the testhead 32 is shown in FIG. 3. The board 14 under test sits on a support plate 45 provided with side stops 46 to support and position the board 14. The fixture 22 is within a vacuum-sealable casing 47 which supports the support plate 45 on a spring seal 48. The fixture 22 itself comprises upper and lower plates--a probe plate 49 and an alignment plate 50. The alignment plate 50 comprises a conical aperture 52 aligned with each of the interface pins 53 on the testhead 32. The underside of the probe plate 49 of the fixture 22 comprises a pin 51 aligned with each of the conical apertures 52 in the alignment plate 50.
The pins 51 can bend to reach the apertures 52 if necessary as shown for the rightmost pin 51 in FIG. 3. Probes 54 extend through the probe plate 49 and the support plate 45 to make electrical contact with the board 14. A wire 55 electrically interconnects each of the probes 54 with a pin 51. The probes 54 may be provided with tulip heads for more reliable connection to protruding wires on the board 14. In FIG. 3 the right most probe 54 has a tulip head 55 for connecting to a lead from a component 56 on the board 14. Tooling pins 57 register the fixture 22 with the support plate 45 and the board 14.
For testing purposes, the cavity 58 is evacuated via vacuum ports 59 to vacuum seal the board 14 to the fixture 22.
Circuit assembly data may be supplied to the system 10 in electronic form, for example the output of a computer-aided design system. The test program generator produces a fixture specification and wiring diagram for implementation by the human test operator. The implementation of the test hardware set-up is a skilled and laborious process but is well-known and will not be described in detail here.
The test program generator 16 calculates where probes 54 are needed to test the components on the board 14 to the test strategy specification. As well as probes for permitting the supply of a test voltage and the detection of test measurements, further probes termed `guard probes` may be needed to help isolate the component under test from its environment.
The test program controller 18 configures the test hardware module 20 to apply the test signals in accordance with the test strategy devised by the test program generator 16. During testing, the test program controller 18 controls a sequence of tests being applied to the board 14 according to the suite of test scripts generated by the test program generator 16. The measurements obtained are supplied to the test program controller 18 which assesses which tests pass and which tests fail on the basis of threshold values supplied by the test program generator 16 and stores the results. When a suite of tests is complete, the results are output in printed form.
Before putting a test system into active service for testing a particular model of circuit assembly, the test system itself needs to be tested or `debugged`. This involves carrying out testing on a `known good circuit assembly` i.e. one which is thought to be fault-free. The objective of the debugging stage is to find and correct faults in the testing procedures and equipment themselves. In practice there are usually some faults in the test system and the majority of these are caused by errors in the data in the circuit assembly database 12. Consequently verification of this data is a key aspect of debugging the test system.
Correct circuit assembly and test-strategy data are also important for the implementation and addition of new tests to a circuit assembly test suite to take account of later revisions to an assembly. Ideally the modifications to the circuit assembly are changed in its representation in the circuit assembly database 12 and an incremental run of the test program generator 16 adapts the test programs and the fixture 22 is altered where necessary. This process counts on the correctness of the already present circuit assembly data.
Other sources of test failure are physical failures (on the supposed `known good circuit assembly`, in the fixture 22 or in the test hardware module 20) and faults inherent in the test system 10 i.e. even with faultless data, the test program generator 16 may not generate wholly appropriate tests.
The process of debugging the test system is distinguished from two other activities that are carried out later in the overall test development process: test optimization and preparation for production. Test optimization aims to shorten the time it takes to run a test suite. In preparation for production, the test suite is run on a representative sample of circuit assemblies for further fine tuning of the tests.
At present what happens in practice during the debugging stage is shown in FIG. 4. Therein it can be seen that a human test developer causes the test system 10 to run the automatically-generated suite of tests once on a known good circuit assembly. A failure list is automatically generated specifying every test which failed by giving the measured and nominal value of the component under test and the high and low tolerances of the test. An example could be
______________________________________ RESISTOR 10: Nominal value 1000 ohms +-5% Measured value 500 ohms ______________________________________
The human test developer tries out changes in the test program which have worked previously, evaluates the results and implements the change that appears best.
There are serious problems inherent in the existing approach to debugging circuit assembly test systems:
This can mean:
Once a circuit testing system is in operational use for testing circuit assemblies, test failures imply that the circuit assembly under test is faulty. Once again, it can be important to locate the root cause of test failure rather than simply implementing the fix that appears to work the best. It has been found that a large proportion of test failures is due to incorrect positioning of the circuit assembly on the fixture and/or insufficient contact between the test probes and the circuit assembly.
In the case of a production line, the diagnosis of faults in circuit assemblies is normally done off-line.
It is known to use expert systems in the field of diagnosing faults in circuit assemblies although these expert systems are either case-based or completely heuristic. No systems for debugging circuit test systems employing expert systems are known.